Publications of Hugues CASSÉ
Zhenyu Bai, Hugues Cassé, Thomas Carle, Christine Rochange
Computing Execution Times with eXecution Decision Diagrams in the Presence of Out-Of-Order Resources
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023, 42 (11), pp.3665-3678. ⟨10.1109/TCAD.2023.3258752⟩
Alban Gruin, Thomas Carle, Christine Rochange, Hugues Cassé, Pascal Sainrat
MINOTAuR: a Timing Predictable RISC-V Core Featuring Speculative Execution
IEEE Transactions on Computers, 2023, 72 (1), pp.183-195. ⟨10.1109/TC.2022.3200000⟩
Zhenyu Bai, Hugues Cassé, Marianne de Michiel, Christine Rochange, Thomas Carle
A Framework for Calculating WCET Based on Execution Decision Diagrams
ACM Transactions on Embedded Computing Systems (TECS), 2022, 21 (3), pp.3476879. ⟨10.1145/3476879⟩
Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quinones, Milos Panic, Jaume Abella, Carles Hernandez, Francisco Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore
ACM Transactions on Embedded Computing Systems (TECS), 2016, 15 (3), ⟨10.1145/2910589⟩
Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor
In : Computer Systems Science & Engineering, CRL Publishing, Leicester – UK, Special issue Real-Time Systems, Vol. 26 N. 6, pp. 20-36, November 2011.
Theo Ungerer, Francisco Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Hugues Cassé, Christine Rochange, Eduardo Quinones, Sascha Uhrig, Mike Gerdes, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische, Marco Paolieri, Julian Wolf
MERASA: Multi-Core Execution of Hard Real-Time Applications Supporting Analysability
In : IEEE Micro, IEEE : Institute of Electrical and Electronics Engineers, Special issue European Multicore Processing Projects, Vol. 30 N. 5, pp. 66-75, September 2010.
Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat
Une approche pour réduire la complexité du flot de contrôle dans les programmes C
In : Technique et science informatiques, Hermès, Vol. 21, N. 7, pp. 1009-1032, 2002.
Hugues Cassé, Louis Féraud, Christine Rochange, Pascal Sainrat
Using Abstract Interpretation Techniques for Static Pointer Analysis
In : Computer Architecture News, ACM, ISSN 0163-5694, Vol. 27 N. 1, pp. 47-50, March 1999.
Abstract URL : http://www.irit.fr/publis/APARA/March/208.ps.gz
BibTeX
Alban Gruin, Thomas Carle, Hugues Cassé, Christine Rochange
Speculative Execution and Timing Predictability in an Open Source RISC-V Core
IEEE Real-Time Systems Symposium (RTSS 2021), Dec 2021, Dortmund, Germany. pp.393-404, ⟨10.1109/RTSS52674.2021.00043⟩
Zhenyu Bai, Hugues Cassé, Marianne de Michiel, Thomas Carle, Christine Rochange
Déterminer le WCET d’applications temps-réel en présence de latences d’exécution variables
Conférence francophone d’informatique en Parallélisme, Architecture et Système (COMPAS 2021), CC-IN2P3 – Centre de Calcul de l’IN2P3 (USR6402); LIP – Laboratoire de l’Informatique du Parallélisme (UMR5668), Jul 2021, Lyon (en virtuel), France
Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks
34th International Conference on Architecture of Computing Systems (ARCS 2021), Jun 2021, Online, Germany. pp.19-34, ⟨10.1007/978-3-030-81682-7_2⟩
Pascal Sotin, Quentin Vermande, Hugues Cassé
Data Cache Analysis by Counting Integer Points
29th International Conference on Real-Time Networks and Systems (RTNS 2021), Apr 2021, Nantes, France. pp.112-122, ⟨10.1145/3453417.3453424⟩
Zhenyu Bai, Hugues Cassé, Marianne de Michiel, Thomas Carle, Christine Rochange
Improving the Performance of WCET Analysis in the Presence of Variable Latencies
21st ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Jun 2020, London, United Kingdom. pp.119-130, ⟨10.1145/3372799.3394371⟩
Wei-Tsun Sun, Eric Jenn, Hugues Cassé
Build Your Own Static WCET analyser: the Case of the Automotive Processor AURIX TC275
10th European Congress on Embedded Real Time Software and Systems (ERTS 2020), Jan 2020, Toulouse, France
Hugues Cassé, Emmanuel Caussé, Pascal Sainrat
Verification of SimNML instruction set description using co-simulation
2nd RISC-V Meeting 2019, Institut de recherche technologique Nanoelec, Grenoble, France; Commissariat à l’énergie atomique et aux énergies alternatives (CEA), France, Oct 2019, Paris, France
Wei-Tsun Sun, Eric Jenn, Hugues Cassé
Validating Static WCET Analysis: A Method and Its Application
19th International Workshop on Worst-Case Execution Time Analysis (WCET 2019), Jul 2019, Stuttgart, Germany. pp.6:1-6:10, ⟨10.4230/OASIcs.WCET.2019.6⟩
Reducing timing interferences in real-time applications running on multicore architectures
18th International Workshop on Worst-Case Execution Time Analysis (WCET 2018), Jul 2018, Barcelone, Spain. pp.1-11
Wei-Tsun Sun, Hugues Cassé, Christine Rochange, Hamza Rihani, Claire Maiza
Using execution graphs to model a prefetch and write buffers and its application to the Bostan MPPA
9th European Congress on Embedded real time Software and Systems (ERTS 2018), Jan 2018, Toulouse, France
Jordy Ruiz, Hugues Cassé, Marianne de Michiel
Working around loops for infeasible path detection in binary programs
IEEE International Working Conference on Source Code Analysis and Manipulation, Sep 2017, Shanghai, China. pp.1–10
Claire Maiza, Pascal Raymond, Catherine Parent-Vigouroux, Armelle Bonenfant, Fabienne Carrier, Hugues Cassé, Philippe Cuenot, Denis Claraz, Nicolas Halbwachs, Erwan Jahier, Hanbing Li, Marianne de Michiel, Vincent Mussot, Isabelle Puaut, Christine Rochange, Erven Rohou, Jordy Ruiz, Pascal Sotin, Wei-Tsun Sun
The W-SEPT Project: Towards Semantic-Aware WCET Estimation
17th International Workshop on Worst-Case Execution Time Analysis (WCET 2017), Jun 2017, Dubrovnik, Croatia. pp.13, ⟨10.4230/OASIcs.WCET.2017.9⟩
Vincent Mussot, Jordy Ruiz, Pascal Sotin, Marianne de Michiel, Hugues Cassé
Expressing and exploiting path conflicts in WCET analysis
16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016) in conjunction with ECRTS, Jul 2016, Toulouse, France. pp. 1-11
Dynamic Branch Resolution based on Combined Static Analyses
16th International Workshop on Worst-Case Execution Time Analysis (WCET 2016) in conjunction with ECRTS, Jul 2016, Toulouse, France. pp. 1-10
Armelle Bonenfant, Fabienne Carrier, Hugues Cassé, Philippe Cuenot, Denis Claraz, Nicolas Halbwachs, Hanbing Li, Claire Maiza, Marianne de Michiel, Vincent Mussot, Catherine Parent-Vigouroux, Isabelle Puaut, Pascal Raymond, Erven Rohou, Pascal Sotin
When the worst-case execution time estimation gains from the application semantics
8th European Congress on Embedded Real-Time Software and Systems, Jan 2016, Toulouse, France
Arthur Pyka, Pavel G. Zaykov, Hugues Cassé, Haluk Ozaktas, Christine Rochange, Sascha Uhrig
Case study: Performance and WCET analysis for parallelised avionic applications with ODC2
IEEE 13th International Conference on Industrial Informatics (INDIN 2015), IEEE Industrial Electronics Society; Anglia Ruskin University, Jul 2015, Cambridge, UK, United Kingdom. pp.1400–1407, ⟨10.1109/INDIN.2015.7281939⟩
Hugues Cassé, Haluk Ozaktas, Christine Rochange
A Framework to Quantify the Overestimations of Static WCET Analysis
15th International Workshop on Worst-Case Execution Time Analysis (WCET 2015), Jul 2015, Lund, Sweden. pp. 1-10
Using SMT Solving for the Lookup of Infeasible Paths in Binary Programs
15th International Workshop on Worst-Case Execution Time Analysis (WCET 2015), Jul 2015, Lund, Sweden. pp. 95-104
Arthur Pyka, Lillian Tadros, Sascha Uhrig, Hugues Cassé, Haluk Ozaktas, Christine Rochange
WCET Analysis of Parallel Benchmarks using On-Demand Coherent Cache
Workshop on High-performance and Real-time Embedded Systems, Jan 2015, Amsterdam, Unknown Region
Theo Ungerer, Christian Bradatsch, Martin Frieb, Florian Kluge, Jörg Mische, Alexander Stegmeier, Ralf Jahr, Mike Gerdes, Pavel Zaykov, Lucie Matusova, Zai Jian Jia Li, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, David George, Ian Broster, Eduardo Quinones, Milos Panic, Jaume Abella, Carles Hernandez, Francisco Cazorla, Sascha Uhrig, Mathias Rohde, Arthur Pyka
Experiences and Results of Parallelisation of Industrial Hard Real-time Applications for the parMERASA Multi-core
3rd Workshop on High-performance and Real-time Embedded Systems (HiRES 2015) in conjunction with HiPEAC 2015, Luís Miguel Pinho, CISTER, Portugal; Eduardo Quiñones, BSC, Spain; Sascha Uhrig, TU Dortmund, Germany, Jan 2015, Amsterdam, Netherlands
Hajer Herbegue, M Filali, Hugues Cassé
Formal Architecture Specification for Time Analysis
International Conference on Architecture of Computing Systems (ARCS 2014), Feb 2014, Lubeck, Germany. pp.98-110, ⟨10.1007/978-3-319-04891-8_9⟩
Hajer Herbegue Bouhachem, Mamoun Filali, Hugues Cassé
A constraint-based WCET computation framework (short paper)
In : Junior Researcher Workshop on Real-Time Computing, Sophia Antipolis, France, 16/10/13-18/10/13, Université de Nice (LEAT), pp. 33-36, October 2013.
Hajer Herbegue Bouhachem, Hugues Cassé, Mamoun Filali, Christine Rochange
Hardware architecture specification and constraint-based WCET computation (regular paper)
In : IEEE International Symposium on Industrial Embedded Systems (SIES 2013), POrto, Portugal, 19/06/13-21/06/13, IEEE : Institute of Electrical and Electronics Engineers, pp. 259-268, September 2013.
Theo Ungerer, Christian Bradatsch, Mike Gerdes, Florian Kluge, Ralf Jahr, Jörg Mische, Joao Fernandes, Zaykov Pavel, Zlatko Petrov, Bert Böddeker, Sebastian Kehr, Hans Regler, Andreas Hugl, Christine Rochange, Haluk Ozaktas, Hugues Cassé, Armelle Bonenfant, Pascal Sainrat, Nick Lay, Ian Broster, David George, Eduardo Quinones, Milos Panic, Francisco Cazorla, Jaume Abella, Sascha Uhrig, Mathias Rohde, Arthur Pyka
parMERASA Multi-Core Execution of Parallelised Hard Real-Time Applications Supporting Analysability (regular paper)
In : Euromicro Conference on Digital System Design (DSD 2013), Santander (Spain), 04/09/13-06/09/13, IEEE : Institute of Electrical and Electronics Engineers, pp. 363-370, September 2013.
Hugues Cassé, Florian Birée, Pascal Sainrat
Multi-architecture Value Analysis for Machine Code (regular paper)
In : Workshop on Worst-Case Execution Time Analysis, Paris, 09/07/13, OASICs, Dagstuhl Publishing, pp. 42-52, July 2013.
Jakob Zwirchmayr, Armelle Bonenfant, Marianne De Michiel, Hugues Cassé, Laura Kovacs, Jens Knoop
FFX: A Portable WCET Annotation Language (regular paper)
In : International Conference on Real-Time and Network Systems (RTNS 2012), Pont-à-Mousson, 08/11/12-09/11/12, ACM Digital Library, pp. 91-100, November 2012.
Marianne De Michiel, Armelle Bonenfant, Hugues Cassé
Normalisation of Loops with Covariant Variables (regular paper)
In : Tools for Automatic Program AnalysiS (TAPAS 2012), Deauville, 14/09/12, Science Direct, Electronic Notes in Theoretical Computer Science 289, pp. 41-51, September 2012.
Frédéric Boniol, Hugues Cassé, Eric Noulard, Claire Pagetti
Deterministic Execution Model on COTS Hardware (regular paper)
In : International Conference on Architecture of Computing Systems (ARCS 2012), Munich, 28/02/12-02/03/12, Springer, pp. 98-110, March 2012.
Reinhard Von Hanxleden, Niklas Holsti, Björn Lisper, Erhard Ploedereder , Reinhard Wilhelm, Armelle Bonenfant, Hugues Cassé, Sven Bünte, Wolfgang Fellger, Sebastian Gepperth , Jan Gustafsson, Benedikt Huber, Nazrul Mohammad Islam, Daniel Kästner, Raimund Kirner, Laura Kovacs, Felix Krause, Marianne De Michiel, Mads Christian Olesen, Adrian Prantl, Wolfgang Puffitsch , Christine Rochange, Martin Schoeberl , Simon Wegener , Michael Zolda, Jakob Zwirchmayr
WCET Tool Challenge: Report (regular paper)
In : Workshop on Worst-Case Execution Time Analysis, Porto, 05/07/11, Politécnico do Porto, pp. 104-141, July 2011.
Charles Lesire, David Doose, Hugues Cassé
Validation of real-time properties of a robotic software architecture (regular paper)
In : National Conference on Control Architectures of Robots (CAR 2011), Grenoble, 24/05/11-25/05/11, Archives ouvertes HAL, (on line), May 2011.
Hugues Cassé, Jonathan Barre, Rodolphe Vaillant-David, Pascal Sainrat
Fast Instruction-Accurate Simulation with SimNML (regular paper)
In : Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO 2011), Heraklion, Crète, Grèce, 22/01/11, Université de Lille, pp. 8-12, January 2011.
URL : http://www.irit.fr/publis/TRACES/12161_rapido2011.pdf
BibTeXMarianne De Michiel, Armelle Bonenfant, Clément Ballabriga, Hugues Cassé
Partial Flow Analysis with oRange (short paper)
In : International on Symposium Leveraging Applications of Formal Methods, Verification and Validation (ISoLA 2010), Heraklion, 18/10/10-20/10/10, Springer, LNCS 6416, pp. 479-482, October 2010.
URL : http://www.irit.fr/publis/TRACES/11831_isola.pdf
BibTeXClément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat
OTAWA: an Open Toolbox for Adaptive WCET Analysis (regular paper)
In : IFIP Workshop on Software Technologies for Future Embedded and Ubiquitous Systems (SEUS 2010), Waidhofen/Ybbs, Austria, 13/10/10-15/10/10, Springer, pp. 35-46, October 2010.
URL : http://www.irit.fr/publis/TRACES/11771_seus2010.pdf
BibTeXVincent Lefftz, Jean Bertrand, Hugues Cassé, Christophe Clienti, Philippe Coussy, Laurent Maillet-Contoz, Philippe Mercier, Pierre Moreau, Laurence Pierre, Emmanuel Vaumorin
A Design Flow for Critical Embedded Systems (short paper)
In : IEEE International Symposium on Industrial Embedded Systems (SIES 2010), Trento, Italy, 07/07/10-09/07/10, IEEE Computer Society – Conference Publishing Services, pp. 229-233, July 2010.
URL : http://www.irit.fr/publis/TRACES/11739_sies2010.pdf
BibTeXHugues Cassé, Pascal Sainrat, Clément Ballabriga, Marianne De Michiel
Experimentation of WCET computation on both ends of automotive processor range (regular paper)
In : Workshop on Critical Automotive applications: Robustness and Safety (CARS 2010), Valencia, Spain, 27/04/10, ACM : Association for Computing Machinery, pp. 67-70, May 2010.
URL : http://www.irit.fr/publis/TRACES/11476_cars2010.pdf
BibTeXJulian Wolf, Mike Gerdes, Sascha Uhrig, Jörg Mische, Florian Kluge, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-Core Processor (regular paper)
In : International Symposium on Object/component/service-oriented Real-time distributed Computing (ISORC 2010), Carmona, Spain, 05/05/10-06/05/10, IEEE : Institute of Electrical and Electronics Engineers, pp. 193-201, May 2010.
URL : http://www.irit.fr/publis/TRACES/11376_isorc2010.pdf
BibTeXHugues Cassé, Karine Heydemann, Haluk Ozaktas, Jonathan Ponroy, Christine Rochange, Olivier Zendra
A framework to experiment optimizations for real-time and embedded software (regular paper)
In : European Conference on Embedded Real Time Software and Systems (ERTS 2010), Toulouse, 19/05/10-21/05/10, SIA/3AF/SEE, (electronic medium), May 2010.
URL : http://www.irit.fr/publis/TRACES/11355_ERTS2010_0102_final.pdf
BibTeXHaluk Ozaktas, Karine Heydemann, Christine Rochange, Hugues Cassé
Impact of Code Compression on Estimated Worst-Case Execution Times (regular paper)
In : International Conference on Real-Time and Network Systems (RTNS 2009), Paris, 26/09/09-27/10/09, Ecole Centrale d’Electronique (ECE), pp. 55-64, October 2009.
URL : http://www.irit.fr/publis/TRACES/10900_rtns09.pdf
BibTeXTahiry Ratsiambahotra, Hugues Cassé, Pascal Sainrat
A Versatile Generator of Instruction Set Simulators and Disassemblers
In : International Symposium on Performance Evaluation of Computer and Telecommunication Systems (SPECTS 2009), Istanbul, Turkey, 13/07/09-16/07/09, IEEE : Institute of Electrical and Electronics Engineers, pp. 65-72, July 2009.
URL : http://www.irit.fr/publis/TRACES/10727_spects09.pdf
BibTeXClément Ballabriga, Hugues Cassé, Marianne De Michiel
A Generic Framework for Blackbox Components in WCET Computation (regular paper)
In : Workshop on Worst-Case Execution Time Analysis, Dublin, 30/06/09, Vol. 252, Austrian Computer society, pp. 118-129, October 2009.
URL : http://www.irit.fr/publis/TRACES/10609_WCET2009.pdf
BibTeXNiklas Holsti, Jan Gustafsson, Guillem Bernat, Clément Ballabriga, Armelle Bonenfant, Roman Bourgade, Hugues Cassé, Daniel Cordes, Albrecht Kadlec, Raimund Kirner, Jens Knoop, Paul Lokuciejewski, Nicholas Merriam, Marianne De Michiel, Adrian Prantl, Bernhard Rieder, Christine Rochange, Pascal Sainrat, Markus Schordan
WCET Tool Challenge 2008: report
In : International Workshop on Worst-Case Execution Time Analysis (WCET 2008), Prague, 01/07/08-01/07/08, Austrian Computer society, pp. 149-171, October 2008.
URL : http://www.irit.fr/publis/TRACES/9687_challenge08.pdf
BibTeXRoman Bourgade, Clément Ballabriga, Hugues Cassé, Christine Rochange, Pascal Sainrat
Accurate analysis of memory latencies for WCET estimation (regular paper)
In : International Conference on Real-Time and Network Systems (RTNS 2008), Rennes, 16/10/08-17/10/08, IRISA, pp. 161-170, October 2008.
URL : http://www.irit.fr/publis/TRACES/9445_rtns08final.pdf
BibTeXClément Ballabriga, Hugues Cassé
Improving the WCET computation time by IPET using control flow graph partitioning
In : International Workshop on Worst-Case Execution Time Analysis (WCET 2008), Prague, 01/07/08-01/07/08, Austrian Computer society, pp. 19-27, July 2008.
URL : http://www.irit.fr/publis/TRACES/9294_wcet08.pdf
BibTeXMarianne De Michiel, Armelle Bonenfant, Hugues Cassé, Pascal Sainrat
Static loop bound analysis of C programs based on flow analysis and abstract interpretation
In : IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA 2008), Kaohsiung, Taiwan, 25/08/08-27/08/08, IEEE Computer Society, pp. 161-168, August 2008.
Abstract URL : http://www.irit.fr/publis/TRACES/9176_rtcsa_2008_publie_michiel-loopbounds.pdf – http://www.irit.fr/publis/TRACES/9176_rtcsa_2008_michiel-loopbound-slides.pdf
BibTeXFadia Nemer, Hugues Cassé, Pascal Sainrat, Jean-Paul Bahsoun
Inter-Task WCET computation for A-way Instruction Caches
In : IEEE International Symposium on Industrial Embedded Systems (SIES 2008), Montpellier, 11/06/08-13/06/08, IEEE : Institute of Electrical and Electronics Engineers, pp. 193-200, June 2008.
URL : http://www.irit.fr/publis/TRACES/9093_sies_08.pdf
BibTeXClément Ballabriga, Hugues Cassé
Improving the First-Miss Computation in Set-Associative Instruction Caches
In : Euromicro Conference on Real-Time Systems (ECRTS 2008), Prague, 02/07/08-04/07/08, IEEE : Institute of Electrical and Electronics Engineers, pp. 341-350, July 2008.
URL : http://www.irit.fr/publis/TRACES/9078_ecrts08.pdf
BibTeXTahiry Ratsiambahotra, Hugues Cassé, Christine Rochange, Pascal Sainrat
Génération automatique de simulateurs fonctionnels de processeurs
In : Symposium sur les Architectures Nouvelles de Machines (SympA 2008), Fribourg, 11/02/08-13/02/08, Ecole d’ingénieurs et d’architectes de Fribourg, (electronic medium), February 2008.
URL : http://hal.archives-ouvertes.fr/action/open_file.php?url=http://hal.archives-ouvertes.fr/docs/00/20/23/28/PDF/RaCaRoSa2008.1.pdf&docid=202328
BibTeXClément Ballabriga, Hugues Cassé, Pascal Sainrat
An improved approach for set-associative instruction cache partial analysis
In : Annual ACM Symposium on Applied Computing (SAC 2008), Fortaleza (Brazil), 16/03/08-20/03/08, ACM : Association for Computing Machinery, pp. 360-368, March 2008.
Abstract URL : http://www.irit.fr/publis/TRACES/8311_sac08.pdf
BibTeXFadia Nemer, Hugues Cassé, Pascal Sainrat, Ali Awada
Improving the WCET accuracy by inter-task instruction cache analysis
In : IEEE International Symposium on Industrial Embedded Systems (SIES 2007), Lisbonne, 04/07/07-06/07/07, IEEE : Institute of Electrical and Electronics Engineers, pp. 25-32, July 2007.
URL : http://www.irit.fr/publis/TRACES/7839_SIES07.pdf
BibTeXClément Ballabriga, Hugues Cassé, Pascal Sainrat
WCET computation on software components by partial static analysis
In : Junior Researcher Workshop on Real-Time Computing, Nancy, 29/03/07-30/03/07, LORIA, pp. 15-18, March 2007.
Abstract URL : http://www.irit.fr/publis/TRACES/7790_JRWRTC07.pdf
BibTeXHugues Cassé, Christine Rochange
OTAWA, Open Tool for Adaptative WCET Analysis
In : Design, Automation and Test in Europe (Poster session ‘University Booth’) (DATE 2007), Nice, 17/04/07-19/04/07, DATE, (electronic medium), April 2007.
Abstract URL : http://www.irit.fr/publis/TRACES/7722_date2007.pdf
BibTeXHugues Cassé, Christine Rochange, Pascal Sainrat
On the sensitivity of WCET estimates to the variability of basic blocks execution times
In : International Conference on Real-Time and Network Systems (RTNS 2007), Nancy, 29/03/07-30/03/07, INPL, pp. 85-92, March 2007.
Abstract URL : http://www.irit.fr/publis/TRACES/7547_rtns07.pdf
BibTeXFadia Nemer, Hugues Cassé, Pascal Sainrat, Jean-Paul Bahsoun, Marianne De Michiel
PapaBench : A Free Real-Time Benchmark
In : International Workshop on Worst-Case Execution Time Analysis (WCET 2006), Dresden, 04/07/06, Frank Mueller (Eds.), Dagstuhl Research Online Publication Server, (on line), July 2006.
Abstract URL : http://www.irit.fr/publis/TRACES/6680_papabench_wcet2006.pdf
BibTeXOTAWA, a framework for experimenting WCET computations
In : European Congress on Embedded Real-Time Software (ERTS 2006), Toulouse, 25/01/06-27/01/06, Société de l’Electricité, de l’Electronique et des Technologies de l’Information et de la Communication (SEE), (electronic medium), January 2006.
Abstract URL : http://www.irit.fr/publis/TRACES/6278_ERTS06.pdf
BibTeXHugues Cassé, Christine Rochange, Pascal Sainrat
An Open Framework for WCET Analysis
In : IEEE Real-Time Systems Symposium – WIP session, Lisbonne, 05/12/04-07/12/04, IEEE, pp. 13-16, December 2004.
Christine Rochange, Pascal Sainrat, Louis Féraud, Hugues Cassé
Using Abstract Interpretation Technics for Static Pointer Analysis
In : 3rd workshop on Interaction Between Compilers and Computer Architectures (INTERACT’3), San Jose, USA, 03/10/99-07/10/99, Pen-Chung Yew, University of Minnesota, October 1999.
Abstract URL : http://www.irit.fr/publis/APARA/March/A_Interact3.ps.gz
BibTeX
Analyse des références mémoires en C par interprétation abstraite
Master’s Thesis, Université Paul Sabatier, March 2001.
Computation of Worst Case Execution Time
Tutoriel. October 2010.
Abstract URL : http://www.irit.fr/publis/TRACES/11999_socket_workshop2010.pdf
BibTeXHugues Cassé, Jacques Collet, Yves Crouzet, Christine Rochange, Pascal Sainrat
Maîtriser les temps d’exécution
Vulgarisation. November 2007.
Abstract URL : http://www.ups-tlse.fr/servlet/com.univ.collaboratif.utils.LectureFichiergw?CODE_FICHIER=1196687680965&ID_FICHE=5217
BibTeX